System On A Chip Verification Methodology and Techniques
Material type: TextSeries: System On A Chip Verification Methodology and TechniquesPublication details: New York Springer 2000Edition: 1Description: 372ISBN: 9781475774689Subject(s): System On A ChipDDC classification: 621.395 RASItem type | Current library | Collection | Call number | Status | Date due | Barcode |
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Books | GRIET Library and Information Centre Reference | Reference | 621.395 RAS (Browse shelf(Opens below)) | Not For Loan | 118957 |
Browsing GRIET Library and Information Centre shelves, Shelving location: Reference, Collection: Reference Close shelf browser (Hides shelf browser)
621.395 LIB Fault Covering Problems in Reconfigurable VLSI Systems | 621.395 MAZ Genetic Algorithms for VLSI Design Layout and Test Automation | 621.395 PAR VLSI Digital Signal Processing Systems Design and Implementation | 621.395 RAS System On A Chip Verification Methodology and Techniques | 621.395 ROT Fundamentals of Logic Design | 621.395 ROY Introduction to VLSI Design and Technology | 621.395 RUS VHDL for Logic Synthesis |
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