000 00421nam a2200157Ia 4500
008 170101s2013 xx 000 0 und d
020 _a9788132211068
100 _aGajski Daniel D
245 0 _aEmbedded System Design Modeling Synthesis And Verification
260 _aNew Delhi
_bSpringar
_c2013
300 _a352
650 _aElectronics
650 _aEmbedded Systems
700 _aAbdi Samar
942 _2ddc
_cBK
999 _c665593
_d665593